ST STM32F446 Series User Manual

RM0390 Rev 4 149/1328
RM0390 Reset and clock control (RCC)
175
6.3.14 RCC APB2 peripheral clock enable register (RCC_APB2ENR)
Address offset: 0x44
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access.
Bit 5 TIM7EN: TIM7 clock enable
This bit is set and cleared by software.
0: TIM7 clock disabled
1: TIM7 clock enabled
Bit 4 TIM6EN: TIM6 clock enable
This bit is set and cleared by software.
0: TIM6 clock disabled
1: TIM6 clock enabled
Bit 3 TIM5EN: TIM5 clock enable
This bit is set and cleared by software.
0: TIM5 clock disabled
1: TIM5 clock enabled
Bit 2 TIM4EN: TIM4 clock enable
This bit is set and cleared by software.
0: TIM4 clock disabled
1: TIM4 clock enabled
Bit 1 TIM3EN: TIM3 clock enable
This bit is set and cleared by software.
0: TIM3 clock disabled
1: TIM3 clock enabled
Bit 0 TIM2EN: TIM2 clock enable
This bit is set and cleared by software.
0: TIM2 clock disabled
1: TIM2 clock enabled
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res.
SAI2
EN
SAI1
EN
Res. Res. Res.
TIM11
EN
TIM10
EN
TIM9
EN
rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res.
SYSCFG
EN
SPI4
EN
SPI1
EN
SDIO
EN
ADC3
EN
ADC2
EN
ADC1
EN
Res. Res.
USART6
EN
USART1
EN
Res. Res.
TIM8
EN
TIM1
EN
rw rw rw rw rw rw rw rw rw rw rw

ST STM32F446 Series Specifications

General

Brand	ST
Model	STM32F446 Series
Category	Microcontrollers
Language	English