USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS) RM0390
1114/1328 RM0390 Rev 4
31.15.2 OTG interrupt register (OTG_GOTGINT)
Address offset: 0x04
Reset value: 0x0000 0000
The application reads this register whenever there is an OTG interrupt and clears the bits in
this register to clear the OTG interrupt.
Bit 3 VBVALOVAL: V
BUS
valid override value.
This bit is used to set override value for vbusvalid signal when VBVALOEN bit is set.
0: vbusvalid value is '0' when VBVALOEN = 1
1: vbusvalid value is '1' when VBVALOEN = 1
Note: Only accessible in host mode.
Bit 2 VBVALOEN: V
BUS
valid override enable.
This bit is used to enable/disable the software to override the vbusvalid signal using the
VBVALOVAL bit.
0: Override is disabled and vbusvalid signal from the respective PHY selected is used
internally by the core
1: Internally vbusvalid received from the PHY is overridden with VBVALOVAL bit value
Note: Only accessible in host mode.
Bit 1 SRQ: Session request
The application sets this bit to initiate a session request on the USB. The application can
clear this bit by writing a 0 when the host negotiation success status change bit in the
OTG_GOTGINT register (HNSSCHG bit in OTG_GOTGINT) is set. The core clears this bit
when the HNSSCHG bit is cleared.
If you use the USB 1.1 full-speed serial transceiver interface to initiate the session request,
the application must wait until V
BUS
discharges to 0.2 V, after the B-session valid bit in this
register (BSVLD bit in OTG_GOTGCTL) is cleared.
0: No session request
1: Session request
Note: Only accessible in device mode.
Bit 0 SRQSCS: Session request success
The core sets this bit when a session request initiation is successful.
0: Session request failure
1: Session request success
Note: Only accessible in device mode.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
ID
CHNG
DBC
DNE
ADTO
CHG
HNG
DET
Res.
rc_w1rc_w1rc_w1rc_w1
1514131211109876543210
Res. Res. Res. Res. Res. Res.
HNSS
CHG
SRSS
CHG
Res. Res. Res. Res. Res. SEDET Res. Res.
rc_w1 rc_w1 rc_w1
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