RM0390 Rev 4 111/1328
RM0390 Power controller (PWR)
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5.4 Power control registers
5.4.1 PWR power control register (PWR_CR)
Address offset: 0x00
Reset value: 0x0000 C000 (reset by wakeup from Standby mode)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. FISSR FMSSR UDEN[1:0] ODSWEN ODEN
rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
VOS[1:0] ADCDC1 Res. MRUDS LPUDS FPDS DBP PLS[2:0] PVDE CSBF CWUF PDDS LPDS
rw rw rw rw rw rw rw rw rw rw rw rc_w1 rc_w1 rw rw
Bits 31:22 Reserved, must be kept at reset value.
Bit 21 FISSR: Flash Interface Stop while System Run
0: Flash interface clock run (Default value)
1: Flash Interface clock off.
Note: This bit could not be set while executing with the Flash itself. It should be done with a
specific routine executed from RAM.
Bit 20 FMSSR: Flash Memory Stop while System Run
0: Flash standard mode (Default value)
1: Flash forced to be in STOP or Deep Power Down mode (depending of FPDS value bit) by
hardware.
Note: This bit could not be set while executing with the Flash itself. It should be done with a
specific routine executed from RAM
Bits 19:18 UDEN[1:0]: Under-drive enable in stop mode
These bits are set by software. They allow to achieve a lower power consumption in Stop
mode but with a longer wakeup time.
When set, the digital area has less leakage consumption when the device enters Stop mode.
00: Under-drive disable
01: Reserved
10: Reserved
11:Under-drive enable
Bit 17 ODSWEN: Over-drive switching enabled.
This bit is set by software. It is cleared automatically by hardware after exiting from Stop
mode or when the ODEN bit is reset. When set, It is used to switch to Over-drive mode.
To set or reset the ODSWEN bit, the HSI or HSE must be selected as system clock.
The ODSWEN bit must only be set when the ODRDY flag is set to switch to Over-drive
mode.
0: Over-drive switching disabled
1: Over-drive switching enable
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Note: On any over-drive switch (enabled or disabled), the system clock will be stalled during
the internal voltage set up.