USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS) RM0390
1086/1328 RM0390 Rev 4
To guarantee a correct operation for the USB OTG_HS peripheral, the AHB frequency
should be higher than 30 MHz.
31.4.6 High-speed OTG PHY
(a)
The USB OTG_HS core includes an ULPI interface to connect an external HS PHY.
31.5 OTG dual role device (DRD)
Figure 402. OTG_FS A-B device connection
1. External voltage regulator only needed when building a VBUS powered device.
2. STMPS2141STR needed only if the application has to support a VBUS powered device. A basic power
switch can be used if 5 V are available on the application board.
31.5.1 ID line detection
The host or peripheral (the default) role is assumed depending on the ID input pin. The ID
line status is determined on plugging in the USB cable, depending on whether a MicroA or
MicroB plug is connected to the micro-AB receptacle.
• If the B-side of the USB cable is connected with a floating ID wire, the integrated pull-
up resistor detects a high ID level and the default peripheral role is confirmed. In this
configuration the OTG_FS/OTG_HS complies with the standard FSM described in
section 4.2.4: ID pin of the On-the-Go specification Rev2.0, supplement to the USB2.0.
• If the A-side of the USB cable is connected with a grounded ID, the OTG_FS/OTG_HS
issues an ID line status change interrupt (CIDSCHG bit in OTG_GINTSTS) for host
software initialization, and automatically switches to the host role. In this configuration
the OTG_FS/OTG_HS complies with the standard FSM described by section 4.2.4: ID
pin of the On-the-Go specification Rev2.0, supplement to the USB2.0.
a. The content of this section applies only to USB OTG HS.
06Y9
26&B,1
26&B287
*3,2
*3,2,54
9
''
(1
2YHUFXUUHQW
9WR9
''
9ROWDJH
UHJXODWRU
9
''
93ZU
9%86
'0
'3
,'
9
66
67036675
&XUUHQWOLPLWHG
SRZHUGLVWULEXWLRQ
VZLWFK
86%PLFUR$%FRQQHFWRU