USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS) RM0390
1164/1328 RM0390 Rev 4
31.15.36 OTG device OUT endpoint common interrupt mask register
(OTG_DOEPMSK)
Address offset: 0x814
Reset value: 0x0000 0000
This register works with each of the OTG_DOEPINTx registers for all endpoints to generate
an interrupt per OUT endpoint. The OUT endpoint interrupt for a specific status in the
OTG_DOEPINTx register can be masked by writing into the corresponding bit in this
register. Status bits are masked by default.
Note: Configuration register for USB OTG FS
Note: Configuration register for USB OTG HS
Bit 4 ITTXFEMSK: IN token received when Tx FIFO empty mask
0: Masked interrupt
1: Unmasked interrupt
Bit 3 TOM: Timeout condition mask (Non-isochronous endpoints)
0: Masked interrupt
1: Unmasked interrupt
Bit 2 AHBERRM: AHB error mask for USB OTG HS
0: Masked interrupt
1: Unmasked interrupt
Bit 1 EPDM: Endpoint disabled interrupt mask
0: Masked interrupt
1: Unmasked interrupt
Bit 0 XFRCM: Transfer completed interrupt mask
0: Masked interrupt
1: Unmasked interrupt
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res.
NYET
MSK
NAK
MSK
BERR
M
Res. Res. Res.
OUT
PKT
ERRM
Res. Res.
STS
PHSR
XM
OTEPD
M
STUPM Res. EPDM
XFRC
M
rw rw rw rw rw rw rw rw rw
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res.
NYET
MSK
NAK
MSK
BERR
M
Res. Res. Res.
OUT
PKT
ERRM
Res.
B2B
STUPM
STS
PHSR
XM
OTEPD
M
STUPM
AHB
ERRM
EPDM
XFRC
M
rw rw rw rw rw rw rw rw rw rw rw