USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS) RM0390
1166/1328 RM0390 Rev 4
31.15.37 OTG device all endpoints interrupt register (OTG_DAINT)
Address offset: 0x818
Reset value: 0x0000 0000
When a significant event occurs on an endpoint, a OTG_DAINT register interrupts the
application using the device OUT endpoints interrupt bit or device IN endpoints interrupt bit
of the OTG_GINTSTS register (OEPINT or IEPINT in OTG_GINTSTS, respectively). There
is one interrupt bit per endpoint, up to a maximum of 16 bits for OUT endpoints and 16 bits
for IN endpoints. For a bidirectional endpoint, the corresponding IN and OUT interrupt bits
are used. Bits in this register are set and cleared when the application sets and clears bits in
the corresponding device endpoint-x interrupt register (OTG_DIEPINTx/OTG_DOEPINTx).
31.15.38 OTG all endpoints interrupt mask register
(OTG_DAINTMSK)
Address offset: 0x81C
Reset value: 0x0000 0000
The OTG_DAINTMSK register works with the device endpoint interrupt register to interrupt
the application when an event occurs on a device endpoint. However, the OTG_DAINT
register bit corresponding to that interrupt is still set.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
OEPINT[15:0]
rrrrrrrrrrrrrrrr
1514131211109876543210
IEPINT[15:0]
rrrrrrrrrrrrrrrr
Bits 31:16 OEPINT[15:0]: OUT endpoint interrupt bits
One bit per OUT endpoint:
Bit 16 for OUT endpoint 0, bit 19 for OUT endpoint 3.
Bits 15:0 IEPINT[15:0]: IN endpoint interrupt bits
One bit per IN endpoint:
Bit 0 for IN endpoint 0, bit 3 for endpoint 3.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
OEPM[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
IEPM[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
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