RM0390 Rev 4 1233/1328
RM0390 USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS)
1264
3. The OTG_HS host attempts to send an IN token at the beginning of the next (odd)
frame/micro-frame.
4. As soon the packet is received and written to the receive FIFO, the OTG_HS host
generates a CHH interrupt.
5. In response to the CHH interrupt, reinitialize the channel for the next transfer.
Figure 421. Normal interrupt IN transactions - DMA mode
• Isochronous OUT transactions in DMA mode
1. Initialize and enable channel x as explained in Section : Channel initialization.
2. The OTG_HS host starts fetching the first packet as soon as the channel is enabled,
and writes the OUT request along with the last 32-bit word fetch. In high-bandwidth
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