RM0390 Rev 4 903/1328
RM0390 SPDIF receiver interface (SPDIFRX)
929
Figure 345. Thresholds
The preamble detector checks four consecutive transitions of a specific sequence to
determine if they form the part of preamble. Let us say TRANS0, TRANS1, TRANS2 and
TRANS3 represent four consecutive transitions encoded as mentioned above. Table 167
shows the values of these four transitions to form a preamble. Absence of this pattern
indicates that these transitions form part of the data in the sub frame and bi-phase decoder
will decode them.
Bi-phase decoder
The Bi-phase decoder decodes the input bi-phase marked data stream using the transition
information provided by the transition coder and preamble detector block. It first waits for
the preamble detection information. After the preamble detection, it decodes the following
transition information:
• If the incoming transition information is TM then it is decoded as a ‘0’.
• Two consecutive TS are decoded as a ‘1’.
• Any other transition sequence generates an error signal (FERR set to 1).
After decoding 28 data bits this way, this module looks for the following preamble data. If the
new preamble is not what is expected, then this block generates an error signal (FERR set
to 1). Refer to Section 27.3.8: Reception errors, for additional information on error flags.
Data packing
This block is responsible of the decoding of the IEC-60958 frames and blocks. It also
handles the writing into the RX_BUF or into SPDIFRX_CSR register.
Table 167. Transition sequence for preamble
Preamble type
Biphase data
pattern
TRANS3 TRANS2 TRANS1 TRANS0
Preamble B 11101000 TL TS TS TL
Preamble M 11100010 TL TL TS TS
Preamble W 11100100 TL TM TS TM
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