USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS) RM0390
1148/1328 RM0390 Rev 4
31.15.23 OTG host all channels interrupt mask register
(OTG_HAINTMSK)
Address offset: 0x418
Reset value: 0x0000 0000
The host all channel interrupt mask register works with the host all channel interrupt register
to interrupt the application when an event occurs on a channel. There is one interrupt mask
bit per channel, up to a maximum of 16 bits.
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 HAINT[15:0]: Channel interrupts
One bit per channel: Bit 0 for Channel 0, bit 15 for Channel 15
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
HAINTM[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 HAINTM[15:0]: Channel interrupt mask
0: Masked interrupt
1: Unmasked interrupt
One bit per channel: Bit 0 for channel 0, bit 15 for channel 15