Secure digital input/output interface (SDIO) RM0390
1020/1328 RM0390 Rev 4
The Card Status size is 32 or 127 bits, depending on the response type.
The most significant bit of the card status is received first. The SDIO_RESP4 register LSB is
always 0b.
29.8.7 SDIO data timer register (SDIO_DTIMER)
Address offset: 0x24
Reset value: 0x0000 0000
The SDIO_DTIMER register contains the data timeout period, in card bus clock periods.
A counter loads the value from the SDIO_DTIMER register, and starts decrementing when
the data path state machine (DPSM) enters the Wait_R or Busy state. If the timer reaches 0
while the DPSM is in either of these states, the timeout status flag is set.
Note: A data transfer must be written to the data timer register and the data length register before
being written to the data control register.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
CARDSTATUSx[31:16]
rrrrrrrrrrrrrrrr
1514131211109876543210
CARDSTATUSx[15:0]
rrrrrrrrrrrrrrrr
Bits 31:0 CARDSTATUSx: see Table 211.
Table 211. Response type and SDIO_RESPx registers
Register Short response Long response
SDIO_RESP1 Card Status[31:0] Card Status [127:96]
SDIO_RESP2 Unused Card Status [95:64]
SDIO_RESP3 Unused Card Status [63:32]
SDIO_RESP4 Unused Card Status [31:1]0b
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
DATATIME[31:16]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
DATATIME[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 DATATIME: Data timeout period
Data timeout period expressed in card bus clock periods.
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