ST STM32F446 Series

RM0390 Rev 4 905/1328
RM0390 SPDIF receiver interface (SPDIFRX)
929
Figure 346. Synchronization flowchart
Refer to Frame structure and synchronization error for additional information concerning
TRCNT overflow.
The FINE SYNC process is re-triggered every frame in order to update thresholds as shown
in Figure 347 in order to continuously track S/PDIF synchronization.
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