ST STM32F446 Series

RM0390 Rev 4 455/1328
RM0390 Advanced-control timers (TIM1&TIM8)
520
Figure 117. Counter timing diagram, update event when ARPE=0
(TIMx_ARR not preloaded)
Figure 118. Counter timing diagram, update event when ARPE=1
(TIMx_ARR preloaded)
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