ST STM32F446 Series User Manual

RM0390 Rev 4 1173/1328
RM0390 USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS)
1264
31.15.47 OTG device control IN endpoint 0 control register
(OTG_DIEPCTL0)
Address offset: 0x900
Reset value: 0x0000 0000
This section describes the OTG_DIEPCTL0 register for USB_OTG FS. Nonzero control
endpoints use registers for endpoints 1–3.
Bit 7 Reserved, must be kept at reset value.
Bit 6 B2BSTUPM: Back-to-back SETUP packets received mask
Applies to control OUT endpoints only.
0: Masked interrupt
1: Unmasked interrupt
Bit 5 Reserved, must be kept at reset value.
Bit 4 OTEPDM: OUT token received when endpoint disabled mask
Applies to control OUT endpoints only.
0: Masked interrupt
1: Unmasked interrupt
Bit 3 STUPM: STUPM: SETUP phase done mask
Applies to control endpoints only.
0: Masked interrupt
1: Unmasked interrupt
Bit 2 AHBERRM: AHB error mask
0: Masked interrupt
1: Unmasked interrupt
Bit 1 EPDM: Endpoint disabled interrupt mask
0: Masked interrupt
1: Unmasked interrupt
Bit 0 XFRCM: Transfer completed interrupt mask
0: Masked interrupt
1: Unmasked interrupt
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
EPENA EPDIS Res. Res. SNAK CNAK TXFNUM[3:0] STALL Res. EPTYP
NAK
STS
Res.
rs rs w w rw rw rw rw rs r r r
1514131211109876543210
USBA
EP
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. MPSIZ[1:0]
r rw rw

ST STM32F446 Series Specifications

General

Brand	ST
Model	STM32F446 Series
Category	Microcontrollers
Language	English