Flexible memory controller (FMC) RM0390
324/1328 RM0390 Rev 4
Refer to Section 2.2.2 on page 56 for the register boundary addresses.
0x114
FMC_BWTR3
Res.
Res.
ACCMOD[1:0]
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
BUSTURN[3:0] DATAST[7:0] ADDHLD[3:0] ADDSET[3:0]
Reset value 00 11111111111111111111
0x11C
FMC_BWTR4
Res.
Res.
ACCMOD[1:0]
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
BUSTURN[3:0] DATAST[7:0] ADDHLD[3:0] ADDSET[3:0]
Reset value 00 11111111111111111111
0x80
FMC_PCR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
ECCPS
[2:0]
TAR[3:0] TCLR[3:0]
Res.
Res.
ECCEN
PWID
[1:0]
PTYP
PBKEN
PWAITEN
Res.
Reset value 00000000000 001100
0x84
FMC_SR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
FEMPT
IFEN
ILEN
IREN
IFS
ILS
IRS
Reset value 1000000
0x88
FMC_PMEM MEMHIZx[7:0] MEMHOLDx[7:0] MEMWAITx[7:0] MEMSETx[7:0]
Reset value 11111100111 111001111110011111100
0x8C
FMC_PATT ATTHIZ[7:0] ATTHOLD[7:0] ATTWAIT[7:0] ATTSET[7:0]
Reset value 11111100111 111001111110011111100
0x94
FMC_ECCR ECCx[31:0]
Reset value 00000000000 000000000000000000000
0x140
FMC_SDCR1
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
RPIPE[
1:0]
RBURST
SDCLK
[1:0]
WP
CAS
[1:0]
NB
MWID
[1:0]
NR[1:0] NC
Reset value 000110100100000
0x144
FMC_SDCR2
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
SDCLK
[1:0]
WP
CAS
[1:0]
NB
MWID
[1:0]
NR[1:0] NC
Reset value 0110100100000
0x148
FMC_SDTR1
Res.
Res.
Res.
Res.
TRCD[3:0] TRP[3:0] TWR[3:0] TRC[3:0] TRAS[3:0] TXSR[3:0] TMRD[3:0]
Reset value 1111111111111111111111111111
0x14C
FMC_SDTR2
Res.
Res.
Res.
Res.
TRCD[3:0] TRP[3:0] TWR[3:0] TRC[3:0] TRAS[3:0] TXSR[3:0] TMRD[3:0]
Reset value 1111111111111111111111111111
0x150
FMC_SDCMR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
MRD[12:0] NRFS[3:0]
CTB1
CTB2
MODE[2:0]
Reset value 0000000000000000000000
0x154
FMC_SDRTR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
REIE
COUNT[12:0]
CRE
Reset value 000000000000000
0x158
FMC_SDSR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
BUSY
MODES2[1:0]
MODES1[1:0]
Res.
Reset value 00000
Table 80. FMC register map (continued)
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
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