EasyManua.ls Logo

ST STM32WL5 Series

ST STM32WL5 Series
1461 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
RM0453 Rev 1 1193/1461
RM0453 Universal synchronous/asynchronous receiver transmitter (USART/UART)
1266
Bit 5 SCEN: Smartcard mode enable
This bit is used for enabling Smartcard mode.
0: Smartcard Mode disabled
1: Smartcard Mode enabled
This bitfield can only be written when the USART is disabled (UE = 0).
Note: If the USART does not support Smartcard mode, this bit is reserved and must be kept
at reset value. Refer to Section 35.4: USART implementation on page 1129.
Bit 4 NACK: Smartcard NACK enable
0: NACK transmission in case of parity error is disabled
1: NACK transmission during parity error is enabled
This bitfield can only be written when the USART is disabled (UE = 0).
Note: If the USART does not support Smartcard mode, this bit is reserved and must be kept
at reset value. Refer to Section 35.4: USART implementation on page 1129.
Bit 3 HDSEL: Half-duplex selection
Selection of Single-wire Half-duplex mode
0: Half duplex mode is not selected
1: Half duplex mode is selected
This bit can only be written when the USART is disabled (UE = 0).
Bit 2 IRLP: IrDA low-power
This bit is used for selecting between normal and low-power IrDA modes
0: Normal mode
1: Low-power mode
This bit can only be written when the USART is disabled (UE = 0).
Note: If IrDA mode is not supported, this bit is reserved and must be kept at reset value.
Refer to Section 35.4: USART implementation on page 1129.
Bit 1 IREN: IrDA mode enable
This bit is set and cleared by software.
0: IrDA disabled
1: IrDA enabled
This bit can only be written when the USART is disabled (UE = 0).
Note: If IrDA mode is not supported, this bit is reserved and must be kept at reset value.
Refer to Section 35.4: USART implementation on page 1129.
Bit 0 EIE: Error interrupt enable
Error Interrupt Enable Bit is required to enable interrupt generation in case of a framing
error, overrun error noise flag or SPI slave underrun error (FE = 1 or ORE = 1 or NE = 1 or
UDR = 1 in the USART_ISR register).
0: Interrupt inhibited
1: interrupt generated when FE = 1 or ORE = 1 or NE = 1 or UDR = 1 (in SPI slave mode) in
the USART_ISR register.

Table of Contents

Related product manuals