RM0453 Rev 1 1251/1461
RM0453 Low-power universal asynchronous receiver transmitter (LPUART)
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Bits 31:29 TXFTCFG[2:0]: TXFIFO threshold configuration
000:TXFIFO reaches 1/8 of its depth.
001:TXFIFO reaches 1/4 of its depth.
110:TXFIFO reaches 1/2 of its depth.
011:TXFIFO reaches 3/4 of its depth.
100:TXFIFO reaches 7/8 of its depth.
101:TXFIFO becomes empty.
Remaining combinations: Reserved.
Bit 28 RXFTIE: RXFIFO threshold interrupt enable
This bit is set and cleared by software.
0: Interrupt is inhibited
1: An LPUART interrupt is generated when Receive FIFO reaches the threshold
programmed in RXFTCFG.
Bits 27:25 RXFTCFG[2:0]: Receive FIFO threshold configuration
000:Receive FIFO reaches 1/8 of its depth.
001:Receive FIFO reaches 1/4 of its depth.
110:Receive FIFO reaches 1/2 of its depth.
011:Receive FIFO reaches 3/4 of its depth.
100:Receive FIFO reaches 7/8 of its depth.
101:Receive FIFO becomes full.
Remaining combinations: Reserved.
Bit 24 Reserved, must be kept at reset value.
Bit 23 TXFTIE: TXFIFO threshold interrupt enable
This bit is set and cleared by software.
0: Interrupt is inhibited
1: A LPUART interrupt is generated when TXFIFO reaches the threshold programmed in
TXFTCFG.
Bit 22 WUFIE: Wakeup from low-power mode interrupt enable
This bit is set and cleared by software.
0: Interrupt is inhibited
1: An LPUART interrupt is generated whenever WUF = 1 in the LPUART_ISR register
Note: WUFIE must be set before entering in low-power mode.
If the LPUART does not support the wakeup from Stop feature, this bit is reserved and
must be kept at reset value. Refer to Section 35.4: USART implementation.
Bits 21:20 WUS[1:0]: Wakeup from low-power mode interrupt flag selection
This bitfield specifies the event which activates the WUF (Wakeup from low-power mode
flag).
00: WUF active on address match (as defined by ADD[7:0] and ADDM7)
01:Reserved.
10: WUF active on Start bit detection
11: WUF active on RXNE.
This bitfield can only be written when the LPUART is disabled (UE = 0).
Note: If the LPUART does not support the wakeup from Stop feature, this bit is reserved and
must be kept at reset value. Refer to Section 35.4: USART implementation.
Bits 19:16 Reserved, must be kept at reset value.
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