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RM0453 Rev 1 571/1461

RM0453 Analog-to-digital converter (ADC)

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Bit 7 AWD1: Analog watchdog 1 flag

This bit is set by hardware when the converted voltage crosses the values programmed in ADC_TR1

and ADC_HR1 registers. It is cleared by software by programming it to 1.

0: No analog watchdog event occurred (or the flag event was already acknowledged and cleared by

software)

1: Analog watchdog event occurred

Bits 6:5 Reserved, must be kept at reset value.

Bit 4 OVR: ADC overrun

This bit is set by hardware when an overrun occurs, meaning that a new conversion has complete

while the EOC flag was already set. It is cleared by software writing 1 to it.

0: No overrun occurred (or the flag event was already acknowledged and cleared by software)

1: Overrun has occurred

Bit 3 EOS: End of sequence flag

This bit is set by hardware at the end of the conversion of a sequence of channels selected by the

CHSEL bits. It is cleared by software writing 1 to it.

0: Conversion sequence not complete (or the flag event was already acknowledged and cleared by

software)

1: Conversion sequence complete

Bit 2 EOC: End of conversion flag

This bit is set by hardware at the end of each conversion of a channel when a new data result is

available in the ADC_DR register. It is cleared by software writing 1 to it or by reading the ADC_DR

0: Channel conversion not complete (or the flag event was already acknowledged and cleared by

software)

1: Channel conversion complete

Bit 1 EOSMP: End of sampling flag

This bit is set by hardware during the conversion, at the end of the sampling phase.It is cleared by

software by programming it to ‘1’.

0: Not at the end of the sampling phase (or the flag event was already acknowledged and cleared by

software)

1: End of sampling phase reached

Bit 0 ADRDY: ADC ready

This bit is set by hardware after the ADC has been enabled (ADEN = 1) and when the ADC reaches a

state where it is ready to accept conversion requests.

It is cleared by software writing 1 to it.

0: ADC not yet ready to start conversion (or the flag event was already acknowledged and cleared

by software)

1: ADC is ready to start conversion

ST STM32WL5 Series User Manual

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