Sun Microsystems Blade 1500 - Post Max Max; TABLE 7-7 Post Max Max Output Comparison

Chapter 7 Power-On Self-Test 7-13
7.3.6 post max max
The following is the output of POST with max diagnostic level and max output
verbosity. The duration of POST was 140 seconds. The left column is the output. The
right column is information detailing what is happening. If the POST output you see
from your system does not match that in the left column, use the information in the
right column to help diagnose the problem.
/dat/fw/common-source/firmware_re/post/post-build-
4.16.3/Fiesta/taco/integrated (firmware_re)
POST build path is displayed.
0>Copyright © 2004 Sun Microsystems, Inc. All rights reserved
SUN PROPRIETARY/CONFIDENTIAL.
Use is subject to license terms.
Copyright and license are
displayed.
0>OBP->POST Call with %o0=00000800.01012000.
0>Diag level set to MAX.
0>Verbosity level set to NORMAL.
CPU0 is acknowledged and POST
configuration is identified.
0>Start Selftest.....
Testing is started.
0>CPUs present in system: 0
0>Test CPU(s)....Done
CPU is identified and tested.
0>Interrupt Crosscall....Done
Interrupt handlers are set up and
checked.
0>Init Memory....Done
0>PLL Reset....Done
0>Init Memory....Done
0>Test Memory....Done
Memory is initialized, phase
locked loops (PLL) are reset,
memory is reinitialized and
tested.
0>Test CPU Caches....Done
CPU caches are tested.
0>Functional CPU Tests....Done
CPU is tested.
0>IO-Bridge Tests....Done
I/O bridge is tested.
0>INFO:
0> POST Passed all devices.
0>
0>POST: Return to OBP.
POST has passed successfully and
returns control to the OpenBoot
PROM.
TABLE 7-7 post max max Output Comparison
Output Displayed What Is Happening
ok post max max
POST is initiated.
@(#)OBP 4.16.3 2004/11/05 18:29 Sun Blade 1500 (Silver)
Clearing TLBs
Executing Power On Self Test
OpenBoot PROM resets the
system and starts POST.
TABLE 7-6 post max normal Output Comparison (Continued)
Output Displayed What Is Happening