Sun Microsystems Blade 1500 - Page 434

C-2 Sun Blade 1500 Service, Diagnostics, and Troubleshooting Manual • December 2004
C.1.1.1 CPU
■ UltraSPARC IIIi CPU running at 1.5 GHz
■ EPIC-7 Cu copper technology
■ Integrated L1 caches (data, instruction, prefetch, and write)
■ Integrated 1 Mbyte L2 data cache
■ System bus — JIO I/O bridge, JBus frequency of up to 200 MHz.
■ Integrated DDR-1 memory controller
■ Memory — 4 DDR-1 (up to 133/266 MHz) SDRAM DIMMs
■ Maximum 8 GB memory supported
C.1.1.2 I/O Bridge Chip
■ Sun Microsystems JIO custom I/O bridge ASIC
■ JBus
■ 200 MHz bandwidth
■ 128-bit wide MUX address and data bus
■ Dual PCI buses
■ PCI V2.2 compliant
■ 64-bit 66 MHz or 32- and 64-bit 33 MHz capable
■ 8 x 64-byte I/O cache each bus
■ Fully associative I/O memory management unit on each bus
■ Eight external masters with internal arbiters on each bus
C.1.1.3 I/O Subsystem
■ Acer Labs M1535D+
■ PCI to ISA bridge
■ Super I/O interface
■ UltraDMA 100 controller
■ AC97 compliant audio interface
■ I
2
C interface
■ USB 1.1 interface
C.1.1.4 Gigabit Ethernet
■ Broadcom BCM5793
■ 10/100/1000BASE-T Ethernet LAN controller
■ 3rd-generation technology
■ Integrated MAC and PHY