CMS32L051 User Manual |Chapter 14 Serial interface IICA
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Figure 14-31 Communication example of a master device → slave device
(Master device: select 9 clocks of waiting, slave device: select 9 clocks of waiting) (3/4)
(3)
Data~Data~Stop condition
Note 1 To release the master from waiting during transmit, you must write data to the IICAn instead of setting the WRELn
bit.
2. The time from the SCLAn pin signal to the generation of the stop condition after the stop condition is issued is at
least 4.0 u s when set to standard mode and at least 0.6us when set to fast mode.
3. To release the wait during the slave receive, the IICAn must be set to "FFH" or set the WRELn bit.
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