RM0390 Rev 4 31/1328
RM0390 Contents
35
31.15.30 OTG host channel x DMA address register (OTG_HCDMAx)
(x = 0..15, where x = Channel number) . . . . . . . . . . . . . . . . . . . . . . . 1157
31.15.31 Device-mode registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1157
31.15.32 OTG device configuration register (OTG_DCFG) . . . . . . . . . . . . . . . 1158
31.15.33 OTG device control register (OTG_DCTL) . . . . . . . . . . . . . . . . . . . . 1160
31.15.34 OTG device status register (OTG_DSTS) . . . . . . . . . . . . . . . . . . . . . 1162
31.15.35 OTG device IN endpoint common interrupt mask register
(OTG_DIEPMSK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1163
31.15.36 OTG device OUT endpoint common interrupt mask register
(OTG_DOEPMSK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1164
31.15.37 OTG device all endpoints interrupt register (OTG_DAINT) . . . . . . . . 1166
31.15.38 OTG all endpoints interrupt mask register
(OTG_DAINTMSK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1166
31.15.39 OTG device V
BUS
discharge time register
(OTG_DVBUSDIS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1167
31.15.40 OTG device V
BUS
pulsing time register
(OTG_DVBUSPULSE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1167
31.15.41 OTG device threshold control register (OTG_DTHRCTL) . . . . . . . . . 1168
31.15.42 OTG device IN endpoint FIFO empty interrupt mask register
(OTG_DIEPEMPMSK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1169
31.15.43 OTG device each endpoint interrupt register (OTG_DEACHINT) . . . 1170
31.15.44 OTG device each endpoint interrupt mask register
(OTG_DEACHINTMSK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1170
31.15.45 OTG device each IN endpoint-1 interrupt mask register
(OTG_HS_DIEPEACHMSK1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1171
31.15.46 OTG device each OUT endpoint-1 interrupt mask register
(OTG_HS_DOEPEACHMSK1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1172
31.15.47 OTG device control IN endpoint 0 control register
(OTG_DIEPCTL0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1173
31.15.48 OTG device IN endpoint x control register (OTG_DIEPCTLx)
(x = 1..5[FS] / 0..8[HS], where x = endpoint number) . . . . . . . . . . . . 1175
31.15.49 OTG device IN endpoint x interrupt register (OTG_DIEPINTx)
(x = 0..5[FS] /8[HS], where x = Endpoint number) . . . . . . . . . . . . . . . 1177
31.15.50 OTG device IN endpoint 0 transfer size register
(OTG_DIEPTSIZ0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1179
31.15.51 OTG device IN endpoint x DMA address register (OTG_DIEPDMAx)
(x = 0..8, where x = endpoint number) . . . . . . . . . . . . . . . . . . . . . . . . 1180
31.15.52 OTG device IN endpoint transmit FIFO status register
(OTG_DTXFSTSx) (x = 0..5[FS] /8[HS], where
x = endpoint number) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1180
31.15.53 OTG device IN endpoint x transfer size register (OTG_DIEPTSIZx)
(x = 1..5[FS] /8[HS], where x = endpoint number) . . . . . . . . . . . . . . . 1181