ST STM32WL5 Series

Debug support (DBG) RM0453
1374/1461 RM0453 Rev 1
CTI claim tag set register (CTI_CLAIMSETR)
Address offset: 0xFA0
Reset value: 0x0000 000F
CTI claim tag clear register (CTI_CLAIMCLR)
Address offset: 0xFA4
Reset value: 0x0000 0000
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Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. CLAIMSET[3:0]
rw rw rw rw
Bits 31:4 Reserved, must be kept at reset value.
Bits 3:0 CLAIMSET[3:0]: claim tag bits setting
Write:
0000: No effect
XXX1: Sets bit 0.
XX1X: Sets bit 1.
X1XX: Sets bit 2.
1XXX: Sets bit 3.
Read:
1111: Indicates there are four bits in claim tag.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. CLAIMCLR[3:0]
rw rw rw rw
Bits 31:4 Reserved, must be kept at reset value.
Bits 3:0 CLAIMCLR[3:0]: claim tag bits reset
Write:
0b0000: No effect
XXX1: Clears bit 0.
XX1X: Clears bit 1.
X1XX: Clears bit 2.
1XXX: Clears bit 3.
Read: Returns current value of claim tag.