NXP Semiconductors PXN2020 - 31.4.4.2 Slower Receiver Tolerance

Enhanced Serial Communication Interface (eSCI)
PXN20 Microcontroller Reference Manual, Rev. 1
31-26 Freescale Semiconductor
The maximum percent difference between the receiver baud rate and the transmitter baud rate is:
Eqn. 31-6
The maximum percent differences for the supported frames is given in Table 31-20
31.4.4.2 Slower Receiver Tolerance
In this case, the receiver has a slower baud rate than the transmitter, thus the stop bit sampling is still
running while the next start bit is already transmitted. To ensure the correct noise- and framing error-free
reception of the stop bit, the samples RS8, RS9, and RS10 must be located in the transmitted stop bit as
shown in Figure 31-24.
Figure 31-24. Slower Receiver
The maximum tolerance that ensures error-free reception can be calculated with the assumption that RS11
is sampled in the transmitted start bit and RS10 is sampled in the last stop bit.
For an frame with n payload bits and s stop bits, the transmitter starts the transmission of the next start bit
Eqn. 31-7
after the start of the transmission of the previous start bit.
For an frame with n payload bits and s stop bits, the receiver samples the RS10 sample of the last stop bit
Eqn. 31-8
after the successful qualification of the start bit.
To ensure error-free reception of the last stop bit, the transmitter must start the transmission of the start bit
after the receiver samples RS10.
Eqn. 31-9
Table 31-20. Faster Receiver Maximum Tolerance
Payload Bits Max Baudrate Difference tx
STOP
rx
STOP
8 4.63% 144 151
9 4.19% 160 167
13 3.03% 224 231
baudrate
rx
STOP
tx
STOP
–
rx
STOP
---------------------------------------


100
RCLK
START BIT
RXD
START BIT
QUALIFICATION
6 7 8 21 3
RSC
8 9 10
DATA
VOTING
LAST STOP BIT
11
tx
START
ns1++=16RT
TR

rx
STOP
ns+=16RT
RE
9RT
RE
+
rx
STOP
tx
START
