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NXP Semiconductors PXN2020 - 36.7.4 Enabling Nexus2+ Operation; 36.7.5 TCODEs Supported by Nexus2+

NXP Semiconductors PXN2020
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Nexus Development Interface (NDI)
PXN20 Microcontroller Reference Manual, Rev. 1
36-72 Freescale Semiconductor
36.7.4 Enabling Nexus2+ Operation
The Nexus module is enabled by loading a single instruction (ACCESS_AUX_TAP_Z0, as shown in
Table 35-2) into the JTAGC instruction register (IR), and then loading the corresponding OnCE OCMD
register with the NEXUS2_ACCESS instruction (refer to Table 36-2). For the e200z0 Class 2+ Nexus
module, the OCMD value is 0b00_0111_1100. Once enabled, the module is ready to accept control input
via the JTAG pins. See Section 36.4.1.1, Enabling Nexus Clients for TAP Access for more information.
Enabling the Nexus 2+ module automatically enables the generation of Debug Status Messages.
The Nexus module is disabled when the JTAG state machine reaches the test-logic-reset state. This state
can be reached by the negation of the JCOMP pin or by cycling through the state machine using the TMS
pin. The Nexus module also is disabled if a power-on-reset (POR) event occurs. If the Nexus2+ module is
disabled, no trace output is provided, and the module disables (drives inactive) auxiliary port output pins
MDO[11:0], MSEO[1:0], MCKO. Nexus registers are not available for reads or writes.
36.7.5 TCODEs Supported by Nexus2+
The Nexus2+ pins allow for flexible transfer operations via public messages. A TCODE defines the
transfer format, the number and/or size of the packets to be transferred, and the purpose of each packet.
The IEEE-ISTO 5001-2003 standard defines a set of public messages. The Nexus2+ module supports the
public TCODEs seen in Table 36-44. Each message contains multiple packets transmitted in the order
shown in the table.
Table 36-44. Public TCODEs Supported by Nexus2+
Message Name
Packet Size
(bits) Packet
Name
Packet
Type
Packet Description
Min Max
Debug Status 6 6 TCODE Fixed TCODE number = 0 (0x00)
4 4 SRC Fixed source processor identifier
8 8 STATUS Fixed Debug status register (DS[31:24])
Ownership Trace
Message
6 6 TCODE Fixed TCODE number = 2 (0x02)
4 4 SRC Fixed source processor identifier
32 32 PROCESS Fixed Task/Process ID tag
Program Trace —
Direct Branch
Message
1
6 6 TCODE Fixed TCODE number = 3 (0x03)
4 4 SRC Fixed source processor identifier
1 8 I-CNT Variable # sequential instructions executed since last taken branch
Program Trace —
Indirect Branch
Message
1
6 6 TCODE Fixed TCODE number = 4 (0x04)
4 4 SRC Fixed source processor identifier
1 8 I-CNT Variable # sequential instructions executed since last taken branch
1 32 U-ADDR Variable unique part of target address for taken branches/exceptions

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