FlexRay Communication Controller (FlexRAY)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 26-5
— As many as 255 entries for each FIFO
— Global frame ID filtering, based on both value/mask filters and range filters
— Global channel ID filtering
— Global message ID filtering for the dynamic segment
• Four configurable slot error counters
• Four dedicated slot status indicators
— Used to observe slots without using receive message buffers
• Measured value indicators for the clock synchronization
— Internal synchronization frame ID and synchronization frame measurement tables can be
copied into the FlexRay memory
• Fractional macroticks are supported for clock correction
• Maskable interrupt sources provided via individual and combined interrupt lines
• One absolute timer
• One timer that can be configured to absolute or relative
26.1.6 Modes of Operation
This section describes the basic operational power modes of the controller.
26.1.6.1 Disabled Mode
The controller enters the Disabled Mode during hard reset. The controller indicates that it is in the Disabled
Mode by negating the module enable bit MEN in the Module Configuration Register (MCR).
No communication is performed on the FlexRay bus.
All registers with the write access conditions Any Time and Disabled Mode can be accessed for writing as
stated in Section 26.5.2, Register Descriptions.
The application configures the controller by accessing the configuration bits and fields in the Module
Configuration Register (MCR).
26.1.6.1.1 Leave Disabled Mode
The controller leaves the Disabled Mode and enters the Normal Mode, when the application writes 1 to
the module enable bit MEN in the Module Configuration Register (MCR).
NOTE
When the controller was enabled, it cannot be disabled later on.
26.1.6.2 Normal Mode
In this mode the controller is fully functional. The controller indicates that it is in Normal Mode by
asserting the module enable bit MEN in the Module Configuration Register (MCR).
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