FlexRay Communication Controller (FlexRAY)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 26-149
26.6.20.2 Combined Interrupt Sources
Each combined interrupt source generates an interrupt request only when at least one of the interrupt
sources that is combined generates an interrupt request.
26.6.20.2.1 Receive Message Buffer Interrupt
The combined receive message buffer interrupt request RBIRQ is generated when at least one of the
individual receive message buffers generates an interrupt request MBXIRQ[n] and the interrupt enable bit
GIFER.RBIE is set.
26.6.20.2.2 Transmit Message Buffer Interrupt
The combined transmit message buffer interrupt request TBIRQ is generated when at least one of the
individual transmit message buffers generates an interrupt request MBXIRQ[n] and the interrupt enable
bit GIFER.TBIE is asserted.
26.6.20.2.3 Protocol Interrupt
The combined protocol interrupt request PRTIRQ is generated when at least one of the individual protocol
interrupt sources generates an interrupt request and the interrupt enable bit GIFER.PRIE is set.
26.6.20.2.4 CHI Error Interrupt
The combined CHI error interrupt request CHIIRQ is generated when at least one of the individual chi
error interrupt sources generates an interrupt request and the interrupt enable bit GIFER.CHIE is set.
26.6.20.2.5 Module Interrupt
The combined module interrupt request MIRQ is generated if at least one of the combined interrupt
sources generates an interrupt request and the interrupt enable bit GIFER.MIE is set.
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