NXP Semiconductors PXN2020 - 12.3.2.6 High Address Space Block Select Register (HBS)

Flash Memory Array and Control
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 12-15
12.3.2.6 High Address Space Block Select Register (HBS)
The High Address Space Block Select Register (HBS) provides a means to select blocks to be operated on
during erase.
The HBS register is shown in Figure 12-8 and Table 12-9.
Offset: FLASH_REGS_BASE + 0x0010 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R00000000000000
MSEL
W
Reset00000000000000 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R000000
LSEL
W
Reset00000000000000 0 0
Figure 12-7. Low/Mid Address Space Block Select Register (LMS)
Table 12-8. LMS Field Descriptions
Field Description
MSEL[1:0] Mid Address Space Block Select. A value of 1 in the select register signifies that the block is selected for
erase. A value of 0 in the select register signifies that the block is not selected. The reset value for the select
registers is 0, or un-selected.
The blocks must be selected (or un-selected) before doing an erase interlock write as part of the erase
sequence. The select register is not writable once an interlock write is completed until MCR[DONE] is set at
the completion of the requested operation, or if a high voltage operation is suspended. MSEL is also not
writeable during UTest operations, when AIE is high.
In the event that blocks are not present (due to configuration or total memory size), the corresponding select
bits default to un-selected, and are not writable. The reset value is always 0, and register writes have no
effect.
LSEL[9:0] Low Address Space Block Select. A value of 1 in the select register signifies that the block is selected for
erase. A value of 0 in the select register signifies that the block is not selected. The reset value for the select
registers is 0, or un-selected.
The blocks must be selected (or un-selected) before doing an erase interlock write as part of the erase
sequence. The select register is not writable once an interlock write is completed until MCR[DONE] is set at
the completion of the requested operation, or if a high voltage operation is suspended. LSEL is also not
writeable during UTest operations, when AIE is high.
In the event that blocks are not present (due to configuration or total memory size), the corresponding select
bits default to un-selected, and are not writable. The reset value is always 0, and register writes have no
effect.