NXP Semiconductors PXN2020 - 36.5 Nexus Port Controller (NPC); 36.5.1 NPC Overview

Nexus Development Interface (NDI)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 36-13
Figure 36-4. Flow for Enabling e200z0 to put the e200z6 into Debug Mode (Continued)
The flow for enabling the e200z6 Nexus3+ to cause a debug request to the e200z0 is similar.
36.5 Nexus Port Controller (NPC)
The Nexus Port Controller (NPC) is that part of the NDI that controls access and arbitration of the device’s
internal Nexus modules. The NPC contains the port configuration register (PCR) and the device
identification register (DID). The contents of the NPC DID are the same as the JTAGC device
identification register.
36.5.1 NPC Overview
The PXN20 incorporates multiple modules that require development support. Each of these modules
implements a development interface based on the IEEE-ISTO 5001-2001 standard and must share the
input and output ports that interface with the development tool. The NPC controls the usage of these ports
- Using Nexus Read/Write Access,
Configure the CRP Z0VEC register
- Select DBCR0 Register.
- Set DEVT2 Bit
- Select OnCE CMD register.
- Set EX bit to exit debug mode.
Z6 Breakpoint
reached or
entered debug
mode?
- Select DBSR
- Write to DEVT2 bit to clear it.
Z0 enters Debug
Mode
NPC
Z0, Z6 Multi
Z0
Z6
- Select OnCE Control Register (OCR)
- Set DR bit (request debug mode right
out of reset).
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