AMBA Crossbar Switch (AXBS)
PXN20 Microcontroller Reference Manual, Rev. 1
16-2 Freescale Semiconductor
The AXBS supports six slaves running at system frequency. The slave data bus width is 64 bits. Table 16-2
summarizes the crossbar slave port assignments.
16.1.3 Overview
The AXBS allows for concurrent transactions to occur from any master port to any slave port. It is possible
for all master ports and slave ports to be in use at the same time as a result of independent master requests.
If a slave port is simultaneously requested by more than one master port, arbitration logic selects the higher
priority master and grant it ownership of the slave port. All other masters requesting that slave port are
stalled until the higher priority master completes its transactions.
By default, requesting masters are granted access based on a fixed priority. A round-robin priority mode
also is available. In this mode, requesting masters are treated with equal priority and are granted access to
a slave port in round-robin fashion, based on the ID of the last master to be granted access. A block diagram
of the AXBS is shown in Figure 16-1.
The AXBS can place a slave port in a low-power park mode to avoid dissipating any power transitional
address, control or data signals when the master port is not actively accessing the slave port. There is a
one-cycle arbitration overhead for exiting low-power park mode.
16.1.4 Features
• Six master ports:
— Z6 core/Nexus
—eDMA
— Media Local Bus (MLB)
— Fast Ethernet Controller (FEC)
—FlexRay
—Z0 core
M6 Off Platform (FlexRay) 6
M7 Z0 Core 1
Table 16-2. Slave Port Assignments
AXBS Port AXBS Module
S0 Flash port dedicated to Z6
S1 Flash port for all other masters
S2 512K SRAM at address 0x4000_0000
S3 80K SRAM at address 0x4008_0000
S6 AIPS A
S7 AIPS B
Table 16-1. Master Assignments and Master IDs
AXBS Port AXBS Module Master ID
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