Analog-to-Digital Converter (ADC)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 34-39
34.3.2.36 Internal Channel n Data Register (INTDATAREGn)
The INTDATAREGn registers provide conversion results for the group 1 channel (channels 32–63) data
registers. Each data register gives also some information regarding the corresponding result. One
INTDATAREGn register is provided for each channel.
34.3.2.37 External Channel n Data Register (EXTDATAREGn)
The EXTDATAREGn registers provide conversion results for the group 2 channel (channels 64–95) data
registers. Each data register gives also some information regarding the corresponding result. One
EXTDATAREGn register is provided for each channel.
RESULT This bit reflects the mode of conversion for the corresponding channel.
00 Data is a result of normal conversion mode.
01 Data is a result of injected conversion mode.
10 Data is a result of CTU conversion mode.
11 reserved
CDATA Channel 0 – 31 converted data.
Address: See Tabl e 34 -1. Access: User read/write
0123456789101112131415
R
000000000000
VALID OVERW RESULT
W
Reset0000000000000 0 00
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R000000
CDATA
W
Reset0000000000000 0 00
Figure 34-37. Internal Channel n Data Register (INTDATAREGn)
Table 34-39. INTDATAREGn Field Descriptions
Field Description
VALID Used to notify when the data is valid (a new value has been written). It is automatically cleared when data is
read.
OVERW Overwrite data. Used to notify when a conversion data is overwritten by a newer result.The new data is written
or discarded according to the OWREN bit of MCR register.
RESULT This bit reflects the mode of conversion for the corresponding channel.
00 Data is a result of normal conversion mode.
01 Data is a result of injected conversion mode.
10 Data is a result of CTU conversion mode.
11 reserved
CDATA Channel 32 – 63 converted data.
Table 34-38. PRECDATAREGn Field Descriptions
Field Description
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