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NXP Semiconductors PXN2020 - 3.4.9.7 PJ6 - GPIO (PJ[6]); eMIOS Channel (eMIOS[9]); DSPI_D Peripheral Chip Select (PCS_D[5]); 3.4.9.8 PJ7 - GPIO (PJ[7]); eMIOS Channel (eMIOS[8]); DSPI_D Peripheral Chip Select (PCS_D[1]); 3.4.9.9 PJ8 - GPIO (PJ[8]); eMIOS Channel (eMIOS[7]); 3.4.9.10 PJ9 - GPIO (PJ[9]); eMIOS Channel (eMIOS[6])

NXP Semiconductors PXN2020
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Signal Description
PXN20 Microcontroller Reference Manual, Rev. 1
3-36 Freescale Semiconductor
3.4.9.7 PJ6 GPIO (PJ[6]) / eMIOS Channel (eMIOS[9]) / DSPI_D Peripheral
Chip Select (PCS_D[5])
PJ[6] is a GPIO pin. eMIOS[9] is an input/output channel pin for the eMIOS200 module. PCS_D[5] is a
peripheral chip select output pin for the DSPI D module.
3.4.9.8 PJ7 GPIO (PJ[7]) / eMIOS Channel (eMIOS[8]) / DSPI_D Peripheral
Chip Select (PCS_D[1])
PJ[7] is a GPIO pin. eMIOS[8] is an input/output channel pin for the eMIOS200 module. PCS_D[1] is a
peripheral chip select output pin for the DSPI D module.
3.4.9.9 PJ8 GPIO (PJ[8]) / eMIOS Channel (eMIOS[7])
PJ[8] is a GPIO pin. eMIOS[7] is an input/output channel pin for the eMIOS200 module. PJ[8] can be
configured as a wakeup pin in the CRP_PWKENH register.
3.4.9.10 PJ9 GPIO (PJ[9]) / eMIOS Channel (eMIOS[6])
PJ[9] is a GPIO pin. eMIOS[6] is an input/output channel pin for the eMIOS200 module. PJ[9] can be
configured as a wakeup pin in the CRP_PWKENH register.
3.4.9.11 PJ10 GPIO (PJ[10]) / eMIOS Channel (eMIOS[5])
PJ[10] is a GPIO pin. eMIOS[5] is an input/output channel pin for the eMIOS200 module. PJ[10] can be
configured as a wakeup pin in the CRP_PWKENH register.
3.4.9.12 PJ11 GPIO (PJ[11]) / eMIOS Channel (eMIOS[4])
PJ[11] is a GPIO pin. eMIOS[4] is an input/output channel pin for the eMIOS200 module. PJ[11] can be
configured as a wakeup pin in the CRP_PWKENH register.
3.4.9.13 PJ12 GPIO (PJ[12]) / eMIOS Channel (eMIOS[3])
PJ[12] is a GPIO pin. eMIOS[3] is an input/output channel pin for the eMIOS200 module. PJ[12] can be
configured as a wakeup pin in the CRP_PWKENH register.
3.4.9.14 PJ13 GPIO (PJ[13]) / eMIOS Channel (eMIOS[2])
PJ[13] is a GPIO pin. eMIOS[2] is an input/output channel pin for the eMIOS200 module. PJ[13] can be
configured as a wakeup pin in the CRP_PWKENH register.
3.4.9.15 PJ14 GPIO (PJ[14]) / eMIOS Channel (eMIOS[1])
PJ[14] is a GPIO pin. eMIOS[1] is an input/output channel pin for the eMIOS200 module. PJ[14] can be
configured as a wakeup pin in the CRP_PWKENH register.

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