FlexRay Communication Controller (FlexRAY)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 26-11
26.5.2 Register Descriptions
This section provides detailed descriptions of all registers in ascending address order, presented as 16-bit
wide entities
Table 26-4 provides a key for the register figures and register tables.
0x0098 Receive FIFO Range Filter Configuration Register (RFRFCFR) R/W
0x009A Receive FIFO Range Filter Control Register (RFRFCTR) R/W
Dynamic Segment Status
0x009C Last Dynamic Transmit Slot Channel A Register (LDTXSLAR) R
0x009E Last Dynamic Transmit Slot Channel B Register (LDTXSLBR) R
Protocol Configuration
0x00A0
...
0x00DC
Protocol Configuration Register 0 (PCR0)
...
Protocol Configuration Register 30 (PCR30)
R/W
–
R/W
0x00DE
...
0x00E6
Reserved R
Receive FIFO—Configuration (continued)
0x00E8 Receive FIFO System Memory Base Address High Register (RFSYMBADHR) R/W
0x00EA Receive FIFO System Memory Base Address Low Register (RFSYMBADLR) R/W
0x00EC Receive FIFO Periodic Timer Register (RFPTR) R/W
Receive FIFO—Control (continued)
0x00EE Receive FIFO Fill Level and POP Count Register (RFFLPCR) R/W
0x00F0
...
0x00FE
Reserved R
Message Buffers Configuration, Control, Status
0x0100 Message Buffer Configuration, Control, Status Register 0 (MBCCSR0) R/W
0x0102 Message Buffer Cycle Counter Filter Register 0 (MBCCFR0) R/W
0x0104 Message Buffer Frame ID Register 0 (MBFIDR0) R/W
0x0106 Message Buffer Index Register 0 (MBIDXR0) R/W
... ... ...
0x04F8 Message Buffer Configuration, Control, Status Register 127 (MBCCSR127) R/W
0x04FA Message Buffer Cycle Counter Filter Register 127 (MBCCFR127) R/W
0x04FC Message Buffer Frame ID Register 127 (MBFIDR127) R/W
0x04FE Message Buffer Index Register 127 (MBIDXR127) R/W
Table 26-3. FlexRay Memory Map (continued)
Offset Register Access
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