NXP Semiconductors PXN2020 - Page 624

FlexRay Communication Controller (FlexRAY)
PXN20 Microcontroller Reference Manual, Rev. 1
26-10 Freescale Semiconductor
0x0058 Network Management Vector Length Register (NMVLR) R/W
Timer Configuration
0x005A Timer Configuration and Control Register (TICCR) R/W
0x005C Timer 1 Cycle Set Register (TI1CYSR) R/W
0x005E Timer 1 Macrotick Offset Register (TI1MTOR) R/W
0x0060 Timer 2 Configuration Register 0 (TI2CR0) R/W
0x0062 Timer 2 Configuration Register 1 (TI2CR1) R/W
Slot Status Configuration
0x0064 Slot Status Selection Register (SSSR) R/W
0x0066 Slot Status Counter Condition Register (SSCCR) R/W
Slot Status
0x0068 Slot Status Register 0 (SSR0) R
0x006A Slot Status Register 1 (SSR1) R
0x006C Slot Status Register 2 (SSR2) R
0x006E Slot Status Register 3 (SSR3) R
0x0070 Slot Status Register 4 (SSR4) R
0x0072 Slot Status Register 5 (SSR5) R
0x0074 Slot Status Register 6 (SSR6) R
0x0076 Slot Status Register 7 (SSR7) R
0x0078 Slot Status Counter Register 0 (SSCR0) R
0x007A Slot Status Counter Register 1 (SSCR1) R
0x007C Slot Status Counter Register 2 (SSCR2) R
0x007E Slot Status Counter Register 3 (SSCR3) R
MTS Generation
0x0080 MTS A Configuration Register (MTSACFR) R/W
0x0082 MTS B Configuration Register (MTSBCFR) R/W
Shadow Buffer Configuration
0x0084 Receive Shadow Buffer Index Register (RSBIR) R/W
Receive FIFO—Configuration
0x0086 Receive FIFO Watermark and Selection Register (RFWMSR) R/W
0x0088 Receive FIFO Start Index Register (RFSIR) R/W
0x008A Receive FIFO Depth and Size Register (RFDSR) R/W
Receive FIFO—Control
0x008C Receive FIFO A Read Index Register (RFARIR) R
0x008E Receive FIFO B Read Index Register (RFBRIR) R
Receive FIFO—Filter
0x0090 Receive FIFO Message ID Acceptance Filter Value Register (RFMIDAFVR)
R/W
0x0092 Receive FIFO Message ID Acceptance Filter Mask Register (RFMIAFMR) R/W
0x0094 Receive FIFO Frame ID Rejection Filter Value Register (RFFIDRFVR) R/W
0x0096 Receive FIFO Frame ID Rejection Filter Mask Register (RFFIDRFMR) R/W
Table 26-3. FlexRay Memory Map (continued)
Offset Register Access