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NXP Semiconductors PXN2020 - 1.5 Critical Performance Parameters; 1.5.1 Low Power Operation

NXP Semiconductors PXN2020
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Introduction
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 1-5
1.5 Critical Performance Parameters
The critical performance parameters of the PXN20 devices feature the following:
Fully static design operation up to a maximum of 116 MHz, based on 105 C ambient
Temperature range –40° to 105 °C ambient temperature
Low power design
Designed for dynamic power management of core and peripherals
Software-controlled clock gating of peripherals
Simple power domains to minimize leakage in low power modes
Internal voltage regulator (VREG) enables operation with a single input voltage
3.3 V / 5 V supply (nominal)
External Ballast control
ADC analog supply range 3.0 V – 5.5 V
Low voltage detect circuit implemented
Configurable pins
Selectable pull-up, pull-down, or no pull on all GPIO pins
Selectable open-drain pin
1.5.1 Low Power Operation
The PXN20 devices have one dynamic power mode and one static power mode:
Low-power modes use clock gating to halt the clock for all or part of the device
The lowest power mode also uses power gating to automatically turn off the power supply to parts
of the device to minimize leakage
Dynamic power mode: RUN
RUN mode is the main operating mode where the entire device is powered and clocked and
where most processing activity is done
Static power mode: SLEEP
SLEEP mode halts the clock to the entire device and turns off the power to the majority of the
chip in order to offer the lowest power consumption mode of the PXN20. In SLEEP mode the
contents of the cores, on-chip peripheral registers and part of the volatile memory are not held.
The device can be awakened from up to 32 I/O pins, a reset, or from an internal periodic
wake-up. It is also possible to enable the 16 MHz IRC, the 4–40 MHz XTAL, 128 kHz IRC and
the 32 kHz XTAL.
SLEEP1 mode retains 32 KB of the on-chip RAM
SLEEP2 mode retains the 64 KB of the on-chip RAM
SLEEP3 mode retains 128 KB of the on-chip RAM
Fast wake-up using the on-chip 16 MHz IRC allows rapid execution from RAM on exit from
low power modes
In SLEEP mode, a 4 40 MHz XTAL can be enabled to continue to run

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