NXP Semiconductors PXN2020 - 30.3.2.9 DSPI Receive FIFO Registers 0-3 (DSPI_RXFRn)

Deserial – Serial Peripheral Interface (DSPI)
PXN20 Microcontroller Reference Manual, Rev. 1
30-22 Freescale Semiconductor
30.3.2.9 DSPI Receive FIFO Registers 0–3 (DSPI_RXFRn)
The DSPI_RXFRn registers provide visibility into the RX FIFO for debugging purposes. Each register is
an entry in the RX FIFO. The DSPI_RXFR registers are read-only. Reading the DSPI_RXFRn registers
does not alter the state of the RX FIFO.
Offset: DSPI_BASE+ Access: Read
0x003C (DSPI_TXFR0)
0x0040 (DSPI_TXFR1)
0x0044 (DSPI_TXFR2)
0x0048 (DSPI_TXFR3)
0123456789101112131415
RTXCMD
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
RTXDATA
W
Reset0000000000000000
Figure 30-10. DSPI Transmit FIFO Register 0–15 (DSPI_TXFRn)
Table 30-16. DSPI_TXFRn Field Descriptions
Field Description
TXCMD Transmit Command. The TXCMD field contains the command that sets the transfer attributes for the SPI data. See
Section 30.3.2.6, DSPI PUSH TX FIFO Register (DSPI_PUSHR), for details on the command field.
TXDATA Transmit Data. The TXDATA field contains the SPI data to be shifted out.