NXP Semiconductors PXN2020 - 6.2.2.6 Pin Wakeup Source Interrupt Enable Register (CRP_PWKSRCIE); 6.2.2.7 Pin Wakeup Source Flag Register (CRP_PWKSRCF)

Clocks, Reset, and Power (CRP)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 6-11
NOTE
Program any pins that are to be used as wakeup sources as inputs in the
associated SIU_PCRn register prior to entering a low-power mode.
6.2.2.6 Pin Wakeup Source Interrupt Enable Register (CRP_PWKSRCIE)
The CRP_PWKSRCIE register enables interrupt requests individually for each of the pin wakeup sources.
6.2.2.7 Pin Wakeup Source Flag Register (CRP_PWKSRCF)
The CRP_PWKSRCF register indicates external pin wakeup source events.
5
PD3
13
PE3
21
PF11
29
PJ14
6
PD5
14
PE5
22
PF15
30
PK3
7
PD7
15
PE7
23
PJ8
31
PK6
Offset: CRP_BASE + 0x0048 Access: User read/write
012345678910111213141516171819202122232425262728293031
R
PWKSRCIE31-0
W
Reset00000000000000000000000000000000
Figure 6-8. Pin Wakeup Source Interrupt Enable Register (CRP_PWKSRCIE)
Table 6-8. CRP_PWKSRCIE Field Descriptions
Field Description
PWKSRCIEn Pin Wakeup Source Interrupt Enables. The PWKSRIEn bits enable interrupt requests to the system if the
corresponding PWKn bit in CRP_PWKENH/L is asserted.
0 Wakeup source interrupt disabled.
1 Wakeup source interrupt enabled.
Offset: CRP_BASE + 0x004C Access: User read/write
012345678910111213141516171819202122232425262728293031
R PWKSRCF[31:0]
Ww1c
Reset00000000000000000000000000000000
Figure 6-9. Pin Wakeup Source Flag Register (CRP_PWKSRCF)
Table 6-7. Wakeup Source Number vs. Pin (continued)
CRP_PWKENL CRP_PWKENH
PWKn Pin PWKn Pin PWKn Pin PWKn Pin