NXP Semiconductors PXN2020 - 27.4.9 Loop Back Test Mode; 27.5 Initialization Information

Media Local Bus (MLB)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 27-39
Additionally, software may instruct the MLB to automatically disable a logical channel when MLB frame
synchronization is lost. To enable this feature, software must set CSCLRn[FSCD], which causes hardware
to automatically clear the Channel Enable bit (CECHRn[CE]) when synchronization is lost.
Frame synchronization is not supported for asynchronous, control, or isochronous channels.
27.4.9 Loop Back Test Mode
In order to facilitate silicon debug of the MLB Device, hardware supports the Loop-Back Test Mode. This
mode allows testing of the MLB pads, physical layer, link layer, channel protocol, and local channel buffer.
When the DCCR[LBM] bit is set, a data path is enabled which allows RX data from Channel 0 to be sent
out as TX data on Channel 1.
Figure 27-22 illustrates the Loop-Back Test Mode data path.
Figure 27-22. Loop-Back Test Mode Data Path
For Loop-Back Test Mode operation, software must perform the following steps:
• Set the logical ChannelAddresses for Channel 0 and 1. (They cannot be the same address.)
• Enable Channel 0 for receiving synchronous, asynchronous, control, or isochronous data.
• Enable Channel 1 for transmitting the same channel data type as Channel 0.
• Set the Loop-Back Mode bit (DCCR[LBM]).
Restrictions on the Loop-Back Test Mode are as follows:
• No protocol errors or breaks are allowed on either the RX or TX channel.
• Little-Endian mode must be disabled (DCCR[MLE] clear).
• Isochronous packet lengths must be quadlet multiples.
• Next Buffer Ready bits for Channels 0 and 1 must remain clear
(CSCR0[RDY] = CSCR1[RDY] = 0)
27.5 Initialization Information
The flowcharts in the following pages detail the intended software flow for the MLB Device peripheral.
These flowcharts are provided as examples only and are not intended as a source for firmware. Other valid
software flows are possible.
PADS
MediaLB Core
MediaLB
Link Logic
(Link Layer)
(Physical Layer)
MediaLB Interface
Channel 1
Local Buffer
1
Channel 0
Local Buffer
Channel 1
Protocol Engine
(TX)
Channel 0
Protocol Engine
(RX)
DCCR.LMB = 1