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NXP Semiconductors PXN2020 - 27.3.2.5 Version Control Configuration Register (VCCR)

NXP Semiconductors PXN2020
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Media Local Bus (MLB)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 27-13
27.3.2.5 Version Control Configuration Register (VCCR)
The Version Control Configuration Register (VCCR) allows system software to verify the version of the
MLB and the user implementation.
Table 27-11. SMCR Field Descriptions
Field Description
SMMU System Masks MLB Unlock. When set, this bit masks system interrupts generated when a MLB unlock is detected.
At reset, MLB unlock events are masked (SMMU = 1).
0 MLB unlock system interrupt is enabled.
1 MLB unlock system interrupt is disabled.
SMML System Masks MLB Lock. When set, this bit masks system interrupts generated when MLB lock is detected. At reset,
MLB lock events are masked (SMML = 1).
0 MLB lock system interrupt is enabled.
1 MLB lock system interrupt is disabled.
SMSC System Masks SubCommand. When set, this bit masks system interrupts for the MlbSubCmd (E6h) System
Command.
0 MLB SubCommand system interrupt is enabled.
1 MLB SubCommand system interrupt is disabled.
SMCS System Masks Channel Scan. When set, this bit masks system interrupts for the MlbScan (E4h) System Command.
0 MLB Channel Scan system interrupt is enabled.
1 MLB Channel Scan system interrupt is disabled.
SMNU System Masks Network Unlock. When set, this bit masks system interrupts for the MOST_Unlock (E2h) System
Command.
0 MLB Network Unlock system interrupt is enabled.
1 MLB Network Unlock system interrupt is disabled.
SMNL System Masks Network Lock. When set, this bit masks system interrupts for the MOST_Lock (E0h) System
Command.
0 MLB Network Lock system interrupt is enabled.
1 MLB Network Lock system interrupt is disabled.
SMR System Masks Reset. When set, this bit masks system interrupts for the MlbReset (FEh) System Command.
0 MLB Reset system interrupt is enabled.
1 MLB Reset system interrupt is disabled.
Offset: MLB_BASE + 0x001C Access: User read-only
0123456789101112131415
R UMA[7:0] UMI[7:0]
W
Reset0000001100000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R MMA[7:0] MMI[7:0]
W
Reset0000001000000010
Figure 27-6. Version Control Configuration Register (VCCR)

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