NXP Semiconductors PXN2020 - 8.3.2.26 External Interrupt Select Register 2 A (SIU_ISEL2 A)

System Integration Unit (SIU)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 8-45
8.3.2.26 External Interrupt Select Register 2A (SIU_ISEL2A)
The SIU_ISEL2A register selects the source for the external interrupts. Figure 8-72 shows how ISEL1,
ISEL2, and ISEL2A interact.
Offset: SIU_BASE + 0x09C0 Access: User read/write
0123456789101112131415
R
EMIOSSEL7 EMIOSSEL6 EMIOSSEL5 EMIOSSEL4
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
EMIOSSEL3 EMIOSSEL2 EMIOSSEL1 EMIOSSEL0
W
Reset0000000000000000
Figure 8-33. eMIOS Select Register 3 (SIU_EMIOS_SEL3)
Table 8-31. SIU_EMIOS_SELn Field Descriptions
Field Description
EMIOSSELn eMIOS Channel[n] connection options.
0000–0011 eMIOS[n] input pin.
0100 DSPI_A deserialized output.
0101 DSPI_B deserialized output.
0110 DSPI_C deserialized output.
0111 DSPI_D deserialized output.
1000–1111 eMIOS[n] input pin.
Offset: SIU_BASE + 0x09C4 Access: User read/write
0123456789101112131415
R
ESEL15 ESEL14 ESEL13 ESEL12 ESEL11 ESEL10 ESEL9 ESEL8
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
ESEL7 ESEL6 ESEL5 ESEL4 ESEL3 ESEL2 ESEL1 ESEL0
W
Reset0000000000000000
Figure 8-34. External Interrupt Select Register 2A (SIU_ISEL2A)