NXP Semiconductors PXN2020 - 33.4 Memory Map and Register Description; 33.4.1 Module Memory Map

Cross Triggering Unit (CTU)
PXN20 Microcontroller Reference Manual, Rev. 1
33-2 Freescale Semiconductor
Figure 33-1. Cross Triggering Unit Block Diagram
33.4 Memory Map and Register Description
This section provides a detailed description of all CTU registers.
33.4.1 Module Memory Map
The CTU registers are listed in Table 33-1.
Table 33-1. CTU Memory Map
Offset from
CTU_BASE
0xFFFD_8000
Register Access Reset Value Section/Page Size
0x0000 CTU_CSR – Control Status Register R/W
1
0x0000_0000 33.4.1.1/33-4 32
0x0004 CTU_SVR1 – Start Value Register 1 R/W
1
0x0000_0000 33.4.1.2/33-5 32
0x0008 CTU_SVR2 – Start Value Register 2 R/W
1
0x0000_0000 33.4.1.2/33-5 32
0x000C CTU_SVR3 – Start Value Register 3 R/W
1
0x0000_0000 33.4.1.2/33-5 32
Event
Gen
Event
Gen
Event Configuration Register 31
CTU_SVR1
CTU_SVR2
CTU_SVR7
CTU_CVR0
CTU_CVR1
CTU_CVR2
CTU_CVR3
4-bit Prescaler
Counter Arbitration
and
Event arbitration
CHANNEL_VALUE
TRGO
TRG_
INT
flag_ack
next_cmd
and mask/en
Trigger Output
Control
Event
Gen
FLAG0
FLAG1
FLAG32
ch_value_select
clr_flag
Event Configuration Register 0
Event Configuration Register 1
Counters