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NXP Semiconductors PXN2020 - 25.4.6 FEC Frame Transmission

NXP Semiconductors PXN2020
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Fast Ethernet Controller (FEC)
PXN20 Microcontroller Reference Manual, Rev. 1
25-32 Freescale Semiconductor
The 7-wire serial mode interface (RCR[MII_MODE] = 0) operates in what is generally referred to as the
“AMD” mode. 7-wire mode connections to the external transceiver are shown in Table 25-33.
25.4.6 FEC Frame Transmission
The Ethernet transmitter is designed to work with almost no intervention from software. Once
ECR[ETHER_EN] is asserted and data appears in the transmit FIFO, the Ethernet MAC is able to transmit
onto the network.
When the transmit FIFO fills to the watermark (defined by the TFWR), the MAC transmit logic asserts
FEC_TX_EN and starts transmitting the preamble (PA) sequence, the start frame delimiter (SFD), and
then the frame information from the FIFO. However, the controller defers the transmission if the network
Table 25-32. MII Mode
Signal Description EMAC Signal
Transmit Clock FEC_TX_CLK
Transmit Enable FEC_TX_EN
Transmit Data FEC_TXD[3:0]
Transmit Error FEC_TX_ER
Collision FEC_COL
Carrier Sense FEC_CRS
Receive Clock FEC_RX_CLK
Receive Data Valid FEC_RX_DV
Receive Data FEC_RXD[3:0]
Receive Error FEC_RX_ER
Management Data Clock FEC_MDC
Management Data
Input/Output
FEC_MDIO
Table 25-33. 7-Wire Mode Configuration
Signal Description FEC Signal
Transmit Clock
FEC_TX_CLK
Transmit Enable
FEC_TX_EN
Transmit Data
FEC_TXD0
Collision
FEC_COL
Receive Clock
FEC_RX_CLK
Receive Data Valid
FEC_RX_DV
Receive Data
FEC_RXD0

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