NXP Semiconductors PXN2020 - 3.4.9.16 PJ15 - GPIO (PJ[15]); eMIOS Channel (eMIOS[0]); 3.4.10 Port K Pins; 3.4.10.1 PK0 - GPIO (PK[0]); Media Local Bus Clock (MLBCLK); DSPI_B Clock (SCK_B); Clock Output (CLKOUT); 3.4.10.2 PK1 - GPIO (PK[1]); Media Local Bus Signal (MLBSIG); DSPI_B Data Output (SOUT_B); DSPI_D Peripheral Chip Select (PCS_D[4])

Signal Description
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 3-37
3.4.9.16 PJ15 — GPIO (PJ[15]) / eMIOS Channel (eMIOS[0])
PJ[15] is a GPIO pin. eMIOS[0] is an input/output channel pin for the eMIOS200 module.
3.4.10 Port K Pins
3.4.10.1 PK0 — GPIO (PK[0]) / Media Local Bus Clock (MLBCLK) / DSPI_B Clock
(SCK_B) / Clock Output (CLKOUT)
PK[0] is a GPIO pin. MLBCLK is the Media Local Bus (MLB) clock input pin. SCK_B is the SPI clock
pin for the DSPI B module. CLKOUT is the external bus interface clock output (test mode only).
3.4.10.2 PK1 — GPIO (PK[1]) / Media Local Bus Signal (MLBSIG) / DSPI_B Data
Output (SOUT_B) / DSPI_D Peripheral Chip Select (PCS_D[4])
PK[1] is a GPIO pin. MLBSIG is the bidirectional signal line that transfers bus management data to/from
the MOST network controller. SOUT_B is the data output pin for the DSPI B module. PCS_D[4] is a
peripheral chip select output pin for the DSPI D module.
3.4.10.3 PK2 — GPIO (PK[2]) / Media Local Bus Data (MLBDAT) / DSPI_B Data
Input (SIN_B) / DSPI_D Peripheral Chip Select (PCS_D[5])
PK[2] is a GPIO pin. MLBDAT is the bidirectional data line that transfers user data to/from the MOST
network controller. SIN_B is the data input pin for the DSPI B module. PCS_D[5] is a peripheral chip
select output pin for the DSPI D module.
3.4.10.4 PK3 — GPIO (PK[3]) / FlexRay Channel A Receive (FR_A_RX) / External
Analog Mux Address Output (MA[0]) / DSPI_C Peripheral Chip Select
(PCS_C[1])
PK[3] is a GPIO pin. FR_A_RX in the FlexRay Channel A receive pin. MA[0] is an address output for an
external analog multiplexer used to select the multiplexer input channel to connect to the ADC. PCS_C[1]
is a peripheral chip select output pin for the DSPI C module. PK[3] can be configured as a wakeup pin in
the CRP_PWKENH register.
3.4.10.5 PK4 — GPIO (PK[4]) / FlexRay Channel A Transmit (FR_A_TX) / External
Analog Mux Address Output (MA[1]) / DSPI_C Peripheral Chip Select
(PCS_C[2])
PK[4] is a GPIO pin. FR_A_TX is the FlexRay Channel A transmit pin. MA[1] is an address output for
an external analog multiplexer used to select the multiplexer input channel to connect to the ADC.
PCS_C[2] is a peripheral chip select output pin for the DSPI C module.