NXP Semiconductors PXN2020 - Chapter 31 Enhanced Serial Communication Interface (eSCI); 31.1 Introduction; 31.1.1 Block Diagram; 31.1.2 Features

PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 31-1
Chapter 31
Enhanced Serial Communication Interface (eSCI)
31.1 Introduction
The eSCI allows asynchronous serial communications with peripheral devices and other CPUs. The eSCI
has special features that allow the eSCI to operate as a LIN bus master, complying with the LIN 1.3, 2.0,
2.1, and SAE J2602 specification.
31.1.1 Block Diagram
A simplified block diagram of the eSCI illustrates the functionality and interdependence of major blocks
(see Figure 31-1).
Figure 31-1. eSCI Block Diagram
31.1.2 Features
The eSCI has these major features:
• Full-duplex operation
• Standard mark/space non-return-to-zero (NRZ) format
Receive
Shift Register
 16
RXD
Polarity
Control
Baud Rate
Generator
Receive
Data Register
TXD
Transmit
Data Register
Transmit
Shift Register
Internal Data Bus
Receive
Control
Wakeup
Control
Frame Format
Control
Transmit
Control
Internal Data Bus
Interrupt
Generation
Loop
Control
CPU
IRQ
RX DMA
Channel
DMA
CTRL
TX DMA
Channel
DMA
Control
LIN FSM
Control
TCLK
RCLK
BUS
CLK