NXP Semiconductors PXN2020 - 34.3 Memory Map and Register Definition; 34.3.1 ADC Memory Map

Analog-to-Digital Converter (ADC)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 34-3
34.3 Memory Map and Register Definition
This section provides memory maps and detailed descriptions of all registers. Data written to or read from
reserved areas of the memory map is undefined.
34.3.1 ADC Memory Map
This section provides the memory map for the ADC.
Table 34-1. ADC Memory Map
Offset from
ADC_BASE
(ADC_A=
0xFFF8_0000)
Register Access Reset Value Section/Page Size
0x0000 MCR — Main Configuration Register R/W
1
0x0000_0001 34.3.2.1/34-8 32
0x0004 MSR — Main Status Register RO 0x0000_0001 34.3.2.2/34-10 32
0x0008–0x000C Reserved
0x0010 ISR — Interrupt Status Register R/W
1
0x0000_0000 34.3.2.3/34-11 32
0x0014 CEOCFR0 — Channel Pending Register 0 R/W
1
0x0000_0000 34.3.2.4/34-12 32
0x0018 CEOCFR1 — Channel Pending Register 1 R/W
1
0x0000_0000 34.3.2.5/34-13 32
0x001C CEOCFR2 — Channel Pending Register 2 R/W
1
0x0000_0000 34.3.2.6/34-13 32
0x0020 IMR — Interrupt Mask Register R/W
1
0x0000_0000 34.3.2.7/34-14 32
0x0024 CIMR0 — Channel Interrupt Mask Register 0 R/W
1
0x0000_0000 34.3.2.8/34-15 32
0x0028 CIMR1 — Channel Interrupt Mask Register 1 R/W
1
0x0000_0000 34.3.2.9/34-15 32
0x002C CIMR2 — Channel Interrupt Mask Register 2 R/W
1
0x0000_0000 34.3.2.10/34-16 32
0x0030 WTISR — Watchdog Interrupt Threshold Register R/W
1
0x0000_0000 34.3.2.11/34-16 32
0x0034 WTIMR — Watchdog Interrupt Threshold Mask Register R/W
1
0x0000_0000 34.3.2.12/34-17 32
0x0038–0x003C Reserved
0x0040 DMAE — DMA Enable Register R/W
1
0x0000_0000 34.3.2.13/34-18 32
0x0044 DMAR0 — DMA Channel Select Register 0 R/W
1
0x0000_0000 34.3.2.14/34-18 32
0x0048 DMAR1 — DMA Channel Select Register 1 R/W
1
0x0000_0000 34.3.2.15/34-19 32
0x004C DMAR2 — DMA Channel Select Register 2 R/W
1
0x0000_0000 34.3.2.16/34-19 32
0x0050 TRC0 — Threshold Control Register 0 R/W
1
0x0000_0000 34.3.2.17/34-20 32
0x0054h TRC1 — Threshold Control Register 1 R/W
1
0x0000_0000 34.3.2.17/34-20 32
0x0058 TRC2 — Threshold Control Register 2 R/W
1
0x0000_0000 34.3.2.17/34-20 32
0x005C TRC3 — Threshold Control Register 3 R/W
1
0x0000_0000 34.3.2.17/34-20 32
0x0060 THRHLR0 — Threshold Register 0 R/W
1
0x0FFF_0000 34.3.2.18/34-21 32
0x0064 THRHLR1 — Threshold Register 1 R/W
1
0x0FFF_0000 34.3.2.18/34-21 32
0x0068 THRHLR2 — Threshold Register 2 R/W
1
0x0FFF_0000 34.3.2.18/34-21 32