Analog-to-Digital Converter (ADC)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 34-23
34.3.2.21 Presampling Register 1 (PSR1)
The PSR1 register contains the Presampling Enable bits for group 1 channels (channels 32–63).
34.3.2.22 Presampling Register 2 (PSR2)
The PSR2 register contains the Presampling Enable bits for group 2 channels (channels 64–95).
Table 34-21. PSR0 Field Descriptions
Field Description
PRESn When set, presampling is enabled for channel n.
Address: ADC_BASE + 0x0088 Access: User read/write
0123456789101112131415
R
PRES
63
PRES
62
PRES
61
PRES
60
PRES
59
PRES
58
PRES
57
PRES
56
PRES
55
PRES
54
PRES
53
PRES
52
PRES
51
PRES
50
PRES
49
PRES
48
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
PRES
47
PRES
46
PRES
43
PRES
44
PRES
43
PRES
42
PRES
41
PRES
40
PRES
39
PRES
38
PRES
37
PRES
36
PRES
35
PRES
34
PRES
33
PRES
32
W
Reset0000000000000000
Figure 34-22. Presampling Register 1 (PSR1)
Table 34-22. PSR1 Field Descriptions
Field Description
PRESn When set, presampling is enabled for channel n.
Address: ADC_BASE + 0x008C Access: User read/write
0123456789101112131415
R
PRES
95
PRES
94
PRES
93
PRES
92
PRES
91
PRES
90
PRES
89
PRES
88
PRES
87
PRES
86
PRES
85
PRES
84
PRES
83
PRES
82
PRES
81
PRES
80
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
PRES
79
PRES
78
PRES
77
PRES
76
PRES
75
PRES
74
PRES
73
PRES
72
PRES
71
PRES
70
PRES
69
PRES
68
PRES
67
PRES
66
PRES
65
PRES
64
W
Reset0000000000000000
Figure 34-23. Presampling Register 2 (PSR2)
To Next Page
Loading...
