NXP Semiconductors PXN2020 - 24.3.2 Register Descriptions

Enhanced Direct Memory Access Controller (eDMA)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 24-7
24.3.2 Register Descriptions
This section lists the eDMA registers in address order and describes the registers and their bit fields.
Reading reserved bits in a register returns the value of zero. Writes to reserved bits in a register are ignored.
Reading or writing to a reserved memory location generates a bus error.
Many of the control registers have a bit width that matches the number of channels implemented in the
module, or 32 bits in size.
0xFFF4_4024 eDMA Interrupt Request
(EDMA_IRQRL, channels 31–16)
eDMA Interrupt Request
(EDMA_IRQRL, Channels 15–00)
0xFFF4_4028 Reserved
0xFFF4_402C eDMA Error
(EDMA_ERL, channels 31–16)
eDMA Error
(EDMA_ERL, Channels 15–00)
0xFFF4_4030 Reserved
0xFFF4_4034 eDMA Hardware Request Status
(EDMA_HRSL, channels 31–16)
eDMA Hardware Request Status
(EDMA_HRSL, Channels 15–00)
0xFFF4_4038 –
0xFFF4_40FC
Reserved
0xFFF4_4100 eDMA Channel 0
Priority (EDMA_CPR0)
eDMA Channel 1
Priority (EDMA_CPR1)
eDMA Channel 2
Priority (EDMA_CPR2)
eDMA Channel 3
Priority (EDMA_CPR3)
0xFFF4_4104 eDMA Channel 4
Priority (EDMA_CPR4)
eDMA Channel 5
Priority (EDMA_CPR5)
eDMA Channel 6
Priority (EDMA_CPR6)
eDMA Channel 7
Priority EDMA_CPR7)
0xFFF4_4108 eDMA Channel 8
Priority (EDMA_CPR8)
eDMA Channel 9
Priority (EDMA_CPR9)
eDMA Channel 10
Priority (EDMA_CPR10)
eDMA Channel 11
Priority (EDMA_CPR11)
0xFFF4_410C eDMA Channel 12
Priority (EDMA_CPR12)
eDMA Channel 13
Priority (EDMA_CPR13)
eDMA Channel 14
Priority (EDMA_CPR14)
eDMA Channel 15
Priority (EDMA_CPR15)
0xFFF4_4110 eDMA Channel 16
Priority (EDMA_CPR16)
eDMA Channel 17
Priority (EDMA_CPR17)
eDMA Channel 18
Priority (EDMA_CPR18)
eDMA Channel 19
Priority (EDMA_CPR19)
0xFFF4_4114 eDMA Channel 20
Priority (EDMA_CPR16)
eDMA Channel 21
Priority (EDMA_CPR17)
eDMA Channel 22
Priority (EDMA_CPR18)
eDMA Channel 23
Priority (EDMA_CPR19)
0xFFF4_4118 eDMA Channel 24
Priority (EDMA_CPR16)
eDMA Channel 25
Priority (EDMA_CPR17)
eDMA Channel 26
Priority (EDMA_CPR18)
eDMA Channel 27
Priority (EDMA_CPR19)
0xFFF4_411C eDMA Channel 28
Priority (EDMA_CPR16)
eDMA Channel 29
Priority (EDMA_CPR17)
eDMA Channel 30
Priority (EDMA_CPR18)
eDMA Channel 31
Priority (EDMA_CPR19)
0xFFF4_5000 –
0xFFF4_51FC
TCD00–TCD15
0xFFF4_5200 –
0xFFF4_53FC
TCD16–TCD31
0xFFF4_5400 Reserved
Table 24-2. eDMA 32-bit Memory Map—Graphical View (continued)
Address Register