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NXP Semiconductors PXN2020 - 3.4.6.7 PF6 - GPIO (PF[6]); DSPI_B Data Input (SIN_B); DSPI_A Peripheral Chip Select (PCS_A[3]); DSPI_C Peripheral Chip Select (PCS_C[5]); 3.4.6.8 PF7 - GPIO (PF[7]); DSPI_B Peripheral Chip Select (PCS_B[0]); DSPI_C Peripheral Chip Select; (PCS_C[5]); DSPI_D Peripheral Chip Select (PCS_D[4]); 3.4.6.9 PF8 - GPIO (PF[8]); DSPI_C Clock (SCK_C); 3.4.6.10 PF9 - GPIO (PF[9]); DSPI_C Data Output (SOUT_C)

NXP Semiconductors PXN2020
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Signal Description
PXN20 Microcontroller Reference Manual, Rev. 1
3-30 Freescale Semiconductor
3.4.6.7 PF6 GPIO (PF[6]) / DSPI_B Data Input (SIN_B) / DSPI_A Peripheral
Chip Select (PCS_A[3]) / DSPI_C Peripheral Chip Select (PCS_C[5])
PF[6] is a GPIO pin. SIN_B is the data input pin for the DSPI B module. PCS_A[3] is a peripheral chip
select output pin for the DSPI A module. PCS_C[5] is a peripheral chip select output pin for the DSPI C
module.
3.4.6.8 PF7 GPIO (PF[7]) / DSPI_B Peripheral Chip Select (PCS_B[0]) /
DSPI_C Peripheral Chip Select / (PCS_C[5]) / DSPI_D Peripheral Chip
Select (PCS_D[4])
PF[7] is a GPIO pin. PCS_B[0] is a peripheral chip select input/output pin for the DSPI B module.
PCS_C[5] is a peripheral chip select output pin for the DSPI C module. PCS_D[4] is a peripheral chip
select output pin for the DSPI D module. PF[7] can be configured as a wakeup pin in the CRP_PWKENH
register.
3.4.6.9 PF8 GPIO (PF[8]) / DSPI_C Clock (SCK_C)
PF[8] is a GPIO pin. SCK_C is the SPI clock pin for the DSPI C module.
3.4.6.10 PF9 GPIO (PF[9]) / DSPI_C Data Output (SOUT_C)
PF[9] is a GPIO pin. SOUT_C is the data output pin for the DSPI C module.
3.4.6.11 PF10 GPIO (PF[10]) / DSPI_C Data Input (SIN_C)
PF[10] is a GPIO pin. SIN_C is the data input pin for the DSPI C module.
3.4.6.12 PF11 GPIO (PF[11]) / DSPI_C Peripheral Chip Select (PCS_C[0]) /
DSPI_D Peripheral Chip Select / (PCS_D[5]) / DSPI_A Peripheral Chip
Select (PCS_A[4])
PF[11] is a GPIO pin. PCS_C[0] is a peripheral chip select input/output pin for the DSPI C module.
PCS_D[5] is a peripheral chip select output pin for the DSPI D module. PCS_A[4] is a peripheral chip
select output pin for the DSPI A module. PF[11] can be configured as a wakeup pin in the CRP_PWKENH
register.
3.4.6.13 PF12 GPIO (PF[12]) / DSPI_D Clock (SCK_D)
PF[12] is a GPIO pin. SCK_D is the SPI clock pin for the DSPI D module.
3.4.6.14 PF13 GPIO (PF[13]) / DSPI_D Data Output (SOUT_D)
PF[13] is a GPIO pin. SOUT_D is the data output pin for the DSPI D module.

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