Media Local Bus (MLB)
PXN20 Microcontroller Reference Manual, Rev. 1
27-12 Freescale Semiconductor
27.3.2.4 System Mask Configuration Register (SMCR)
The System Mask Configuration register (SMCR) allows system software to mask system status
interrupts.
Offset: MLB_BASE + 0x0008 Access: User read-only
0123456789101112131415
R MSD[31:16]
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R MSD[15:0]
W
Reset0000000000000000
Figure 27-4. System Data Configuration Register (SDCR)
Table 27-10. SDCR Field Descriptions
Field Description
MSD MLB System Data. This register is loaded with the data from MLBDAT during the System Channel quadlet.
Offset: MLB_BASE + 0x000C Access: User read/write
012345678 9101112131415
R 0 0 0 0 0 0000 0 000000
W
Reset0000000000 000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 00000000
SMMU SMML SMSC SMCS SMNU SMNL SMR
W
Reset0000000001 100000
Figure 27-5. System Mask Configuration Register (SMCR)
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