EasyManua.ls Logo

NXP Semiconductors PXN2020 - 20.3 Memory Map and Register Definition; 20.3.1 Memory Map; 20.3.2 Register Descriptions; 20.3.2.1 SWT Control Register (SWT_CR)

NXP Semiconductors PXN2020
1376 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Software Watchdog Timer (SWT)
PXN20 Microcontroller Reference Manual, Rev. 1
20-2 Freescale Semiconductor
20.3 Memory Map and Register Definition
The SWT programming model has seven 32-bit registers. The programming model can only be accessed
using 32-bit (word) accesses. References using a different size are invalid. Other types of invalid accesses
include: writes to read-only registers, incorrect values written to the service register when enabled,
accesses to reserved addresses and accesses by masters without permission. If the RIA bit in the SWT_CR
is set, then the SWT generates a system reset on an invalid access. Otherwise, a bus error is generated. If
either the HLK or SLK bits in the SWT_CR are set, then the SWT_CR, SWT_TO, SWT_WN, and
SWT_SK registers are read-only.
20.3.1 Memory Map
The SWT memory map is shown in Table 20-1.
20.3.2 Register Descriptions
The following sections detail the individual registers within the SWT.
20.3.2.1 SWT Control Register (SWT_CR)
The SWT_CR contains fields for configuring and controlling the SWT. This register is read-only if either
the SWT_CR[HLK] or SWT_CR[SLK] bits are set.
Table 20-1. SWT Memory Map
Offset from
SWT_BASE
(0xFFF3_8000)
Register Access Reset Value Section/Page
0x0000 SWT_CR – SWT control register R/W 0xFF00_0103 20.3.2.1/20-2
0x0004 SWT_IR – SWT interrupt register R/W 0x0000_0000 20.3.2.2/20-4
0x0008 SWT_TO – SWT time-out register R/W 0x0002_7100 20.3.2.3/20-4
0x000C SWT_WN – SWT window register R/W 0x0000_0000 20.3.2.4/20-5
0x0010 SWT_SR – SWT service register R/W 0x0000_0000 20.3.2.5/20-6
0x0014 SWT_CO – SWT counter output register R 0x0000_0000 20.3.2.6/20-6
0x0018 SWT_SK – SWT service key register R/W 0x0000_0000 20.3.2.7/20-7
0x001C– 0x3FFF Reserved

Table of Contents

Related product manuals