NXP Semiconductors PXN2020 User Manual

Enhanced Serial Communication Interface (eSCI)
PXN20 Microcontroller Reference Manual, Rev. 1
31-20 Freescale Semiconductor
31.4 Functional Description
This section provides a complete functional description of the eSCI block, detailing the operation of the
design from the end user perspective in a number of subsections.
31.4.1 Module Control
The operational mode of the module is controlled by the MDIS bit in the eSCI Control Register 2
(eSCI_CR2). The module can transmit and receive data when it is enabled, i.e., MDIS = 1.
31.4.2 Frame Formats
The eSCI module uses the standard NRZ mark/space data format. The eSCI supports three basic frame
types, which are the data frames, break characters, and idle characters.
31.4.2.1 Data Frame Formats
Each data frame contains a character that is surrounded by a start bit, an optional parity or address bit, and
one or two stop bits. The supported data frame formats for transmission and reception are specified in
Table 31-15. The supported data frame formats for reception only are specified in Table 31-16.
Table 31-15. Supported Data Frame Formats for RX and TX
Control Frame Content
eSCI_CR3 eSCI_CR1
Start
Bits
Payload Bits
Stop
Bits
M2 M PE WAKE
Character
Bits
Address
Bits
1
1
The address bit identifies the frame as an address character. See Section 31.4.5.5, Multiprocessor
Communication.
Parity
Bits
LIN byte fields (Figure 31-15)
000018001
SCI frames (8 payload bits)(Figure 31-16)
000018001
000117101
001017011
SCI frames (9 payload bits) (Figure 31-17)
010019001
010118101
011018011

NXP Semiconductors PXN2020 Specifications

General

Brand	NXP Semiconductors
Model	PXN2020
Category	Controller
Language	English